This invention relates to semiconductor read-only memories in general, and more specifically to mask-programmable semiconductor read-only memories. Mask-programmable read-only memories currently in use today are generally fabricated having a Schottky diode or a transistor device as elements of the matrix. The desired bit pattern for this type of ROM is programmed at the interconnect level to determine the logic level output from each particular matrix element. The use of polysilicon junction diodes as logic elements has been described elsewhere (K. Okada et al., "PSA--A New Approach for Bipolar LSI", IEEE; J. Solid State Circuits, vol. SC--13, pp. 6793-6981, Oct. 1978) and the characteristics of such diodes have been reported (J. Manoliu and T. I. Kamins, "P-N Junctions in Polycrystalline-Silicon Films", Solid-State Electron., vol. 15, pp. 1103-1106, 1972; M. Dutoit and F. Sollberger, "Lateral Polysilicon P-N Diodes", Electrochem. Soc., vol. 125. pp 1648-1651, 1978; H. S. deGraaff and J. G. deGroot, "Polycrystalline Devices in Bipolar IC Technology," in IEEE IEDM Conf., Dig. Tech. Papers, pp. 46-49, Dec. 1980 ). The use of such a diode as a ROM matrix element requires low reverse leakage current, low polysilicon sheet resistance to allow use as interconnect, and suitable forward characteristics, the combination of which has not been reported or demonstrated elsewhere. The present invention incorporates these features to allow fabrication of high density, high speed ROM's using the polysilicon diode matrix element.